The release of 7-nm AMD EPIC Rome server processors has been scheduled for mid-2012, but for now, the samples of these chips are tested in the chip makers and its partners.
For example, a 32-core EPIC Rim processor with an identifier ZS1711E3VIVG5_24 / 17_N was seen in the SiSoftvare Sandra database. This engineering instance functioned at a 1.7 GHz base frequency with a dynamic acceleration of up to 2.4 GHz, which is slightly lower than for similar EPIC 7000 chips.
Two months ago, in SiSoft's Sandra database, the 64-core AMD EPIC second generation managed to light up as part of the Dell PoverEdge R7515 server. It is interesting that the hero of today's note was installed in the younger PoverEdge R6515 server. As Dell representatives have previously said, the company will increase AMD's server-based offerings by three times compared to the previous period.
If we look at the ZS1711E3VIVG5_24 / 17_N chip identifier in detail, then next to the 1.7 / 2.4 GHz frequency, we can conclude that there are 16 MB of second-level cache and 128 MB L3 cache. The "Z" prefix refers to the chip qualification sample (KS). Probably AMD compensates for low clock speeds with a proportional increase in operation per hour (IPC), increased L3 volume, or a relatively low processor capacity.